On Thu, Aug 24, 2023 at 09:46:00PM +0800, Kai-Heng Feng wrote: > Hi, > > On Thu, Aug 24, 2023 at 7:57 PM Mika Westerberg > <mika.westerberg@xxxxxxxxxxxxxxx> wrote: > > > > Hi, > > > > On Thu, Aug 24, 2023 at 12:46:43PM +0800, Kai-Heng Feng wrote: > > > In addition to nearest upstream bridge, driver may want to know if the > > > entire hierarchy can be powered off to perform different action. > > > > > > So walk higher up the hierarchy to find out if any device has valid > > > _PR3. > > > > I'm not entirely sure this is good idea. The drivers should expect that > > the power will be turned off pretty soon after device enters D3hot. Also > > _PR3 is not PCI concept it's ACPI concept so API like this would only > > work on systems with ACPI. > > IIUC, Bjorn wants to limit the AER/DPC disablement when device power > is really off. > Is "the power will be turned off pretty soon after device enters > D3hot" applicable to most devices? Since config space is still > accessible when device is in D3hot. Well the device may be part of a topology, say Thunderbolt/USB4 (but can be NVMe or similar) where it initially goes into D3hot but in the end the whole topology is put into D3cold. The device driver really should expect that this happens always and not try to distinguish between the D3hot or D3cold. > Unless there are cases when device firmware behave differently to > D3hot? Then maybe it's better to disable AER for both D3hot, D3cold > and system S3. Yes, this makes sense.
