On Fri, Jun 23, 2023 at 10:40:54AM -0400, Jim Quinlan wrote: > This commit adds the boolean "brcm,enable-l1ss" property: > > The Broadcom STB/CM PCIe HW -- a core that is also used by RPi SOCs -- > requires the driver probe() to deliberately place the HW one of three > CLKREQ# modes: > > (a) CLKREQ# driven by the RC unconditionally > (b) CLKREQ# driven by the EP for ASPM L0s, L1 > (c) Bidirectional CLKREQ#, as used for L1 Substates (L1SS). > > The HW+driver can tell the difference between downstream devices that > need (a) and (b), but does not know when to configure (c). All devices > should work fine when the driver chooses (a) or (b), but (c) may be > desired to realize the extra power savings that L1SS offers. So we > introduce the boolean "brcm,enable-l1ss" property to inform the driver > that (c) is desired. Setting this property only makes sense when the > downstream device is L1SS-capable and the OS is configured to activate > this mode (e.g. policy==powersupersave). > > This property is already present in the Raspian version of Linux, but the > upstream driver implementation that follows adds more details and > discerns between (a) and (b). > > Signed-off-by: Jim Quinlan <james.quinlan@xxxxxxxxxxxx> > Reviewed-by: Rob Herring <robh@xxxxxxxxxx> > --- > Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml > index 7e15aae7d69e..8b61c2179608 100644 > --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml > @@ -64,6 +64,15 @@ properties: > > aspm-no-l0s: true > > + brcm,enable-l1ss: > + description: Indicates that PCIe L1SS power savings > + are desired, the downstream device is L1SS-capable, and the > + OS has been configured to enable this mode. For boards What does this mean ? I don't think DT properties are supposed to carry information related to how the OS is configured. Again - it depends on what DT should be used for, I am not claiming to have any authority on that, just asking. Thanks, Lorenzo > + using a mini-card connector, this mode may not meet the > + TCRLon maximum time of 400ns, as specified in 3.2.5.2.2 > + of the PCI Express Mini CEM 2.0 specification. > + type: boolean > + > brcm,scb-sizes: > description: u64 giving the 64bit PCIe memory > viewport size of a memory controller. There may be up to > -- > 2.17.1 >
