Re: [PATCH] PCI: brcmstb: Avoid downstream access during link training

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On Sun, Aug 6, 2023 at 11:16 AM Florian Fainelli
<florian.fainelli@xxxxxxxxxxxx> wrote:
>
>
>
> On 8/5/2023 9:44 PM, Lukas Wunner wrote:
> > The Broadcom Set Top Box PCIe controller signals an Asynchronous SError
> > Interrupt and thus causes a kernel panic when non-posted transactions
> > time out.  This differs from most other PCIe controllers which return a
> > fabricated "all ones" response instead.
> >
> > To avoid gratuitous kernel panics, the driver reads the link status from
> > a proprietary PCIE_MISC_PCIE_STATUS register and skips downstream
> > accesses if the link is down.
> >
> > However the bits in the proprietary register may purport that the link
> > is up even though link training is still in progress (as indicated by
> > the Link Training bit in the Link Status register).
> >
> > This has been observed with various PCIe switches attached to a BCM2711
> > (Raspberry Pi CM4):  The issue is most pronounced with the Pericom
> > PI7C9X2G404SV, but has also occasionally been witnessed with the Pericom
> > PI7C9X2G404SL and ASMedia ASM1184e.
> >
> > Check the Link Training bit in addition to the PCIE_MISC_PCIE_STATUS
> > register before performing downstream accesses.
> >
> > Signed-off-by: Lukas Wunner <lukas@xxxxxxxxx>
> > Cc: <stable@xxxxxxxxxxxxxxx>
>
> Since you CC stable, it would be neat to provide a Fixes: tag here, most
> likely this dates back from the original commit adding support for this
> driver.
>
> > ---
> >   drivers/pci/controller/pcie-brcmstb.c | 4 +++-
> >   1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
> > index f593a422bd63..b4abfced8e9b 100644
> > --- a/drivers/pci/controller/pcie-brcmstb.c
> > +++ b/drivers/pci/controller/pcie-brcmstb.c
> > @@ -679,8 +679,10 @@ static bool brcm_pcie_link_up(struct brcm_pcie *pcie)
> >       u32 val = readl(pcie->base + PCIE_MISC_PCIE_STATUS);
> >       u32 dla = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK, val);
> >       u32 plu = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK, val);
> > +     u16 lnksta = readw(pcie->base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA);
> > +     u16 lt = FIELD_GET(PCI_EXP_LNKSTA_LT, lnksta);
> >
> > -     return dla && plu;
> > +     return dla && plu && !lt;
>
> The patch looks good to me in spirit though I want Jim to review and

This looks good to me but please allow me a few days to do some
testing -- I'm currently in Covid prison.

Regards,
Jim Quinlan
Broadcom STB

> provide feedback here since he was looking at this sort of issues not so
> long ago.
>
> Thanks for tracking this down!
> --
> Florian

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