Hi Serge, > From: Serge Semin, Sent: Saturday, July 29, 2023 10:41 AM > > On Mon, Jul 24, 2023 at 01:42:50PM +0530, Manivannan Sadhasivam wrote: > > On Fri, Jul 21, 2023 at 04:44:37PM +0900, Yoshihiro Shimoda wrote: > > > Add "code" and "routing" into struct dw_pcie_ob_atu_cfg for sending > > > MSG by iATU in the PCIe endpoint mode in near the future. > > > > It's better to specify the exact requirement here "triggering INTx IRQs" > > instead of implying. > > > > > PCIE_ATU_INHIBIT_PAYLOAD is set to issue TLP type of Msg instead of > > > MsgD. So, this implementation supports the data-less messages only > > > for now. > > > > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx> > > > > > Same comment for patch 4/20 applies here also. With that fixed, > > Yoshihiro, as we greed with Mani in the PATCH 4/20 discussion please > ignore this request. By the way, do you have any comment about my suggestion? [1] [1] https://lore.kernel.org/linux-pci/TYBPR01MB5341407DC508F0B390B84090D801A@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/ If you don't agree my suggestion, I'll ignore this request. Best regards, Yoshihiro Shimoda > -Serge(y) > > > > > Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > > > > - Mani > > > > > Reviewed-by: Serge Semin <fancer.lancer@xxxxxxxxx> > > > --- > > > drivers/pci/controller/dwc/pcie-designware.c | 9 +++++++-- > > > drivers/pci/controller/dwc/pcie-designware.h | 4 ++++ > > > 2 files changed, 11 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c > > > index 49b785509576..2d0f816fa0ab 100644 > > > --- a/drivers/pci/controller/dwc/pcie-designware.c > > > +++ b/drivers/pci/controller/dwc/pcie-designware.c > > > @@ -498,7 +498,7 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, > > > dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_TARGET, > > > upper_32_bits(atu->pci_addr)); > > > > > > - val = atu->type | PCIE_ATU_FUNC_NUM(atu->func_no); > > > + val = atu->type | atu->routing | PCIE_ATU_FUNC_NUM(atu->func_no); > > > if (upper_32_bits(limit_addr) > upper_32_bits(cpu_addr) && > > > dw_pcie_ver_is_ge(pci, 460A)) > > > val |= PCIE_ATU_INCREASE_REGION_SIZE; > > > @@ -506,7 +506,12 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, > > > val = dw_pcie_enable_ecrc(val); > > > dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL1, val); > > > > > > - dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, PCIE_ATU_ENABLE); > > > + val = PCIE_ATU_ENABLE; > > > + if (atu->type == PCIE_ATU_TYPE_MSG) { > > > + /* The data-less messages only for now */ > > > + val |= PCIE_ATU_INHIBIT_PAYLOAD | atu->code; > > > + } > > > + dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, val); > > > > > > /* > > > * Make sure ATU enable takes effect before any subsequent config > > > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h > > > index 85de0d8346fa..c626d21243b0 100644 > > > --- a/drivers/pci/controller/dwc/pcie-designware.h > > > +++ b/drivers/pci/controller/dwc/pcie-designware.h > > > @@ -147,11 +147,13 @@ > > > #define PCIE_ATU_TYPE_IO 0x2 > > > #define PCIE_ATU_TYPE_CFG0 0x4 > > > #define PCIE_ATU_TYPE_CFG1 0x5 > > > +#define PCIE_ATU_TYPE_MSG 0x10 > > > #define PCIE_ATU_TD BIT(8) > > > #define PCIE_ATU_FUNC_NUM(pf) ((pf) << 20) > > > #define PCIE_ATU_REGION_CTRL2 0x004 > > > #define PCIE_ATU_ENABLE BIT(31) > > > #define PCIE_ATU_BAR_MODE_ENABLE BIT(30) > > > +#define PCIE_ATU_INHIBIT_PAYLOAD BIT(22) > > > #define PCIE_ATU_FUNC_NUM_MATCH_EN BIT(19) > > > #define PCIE_ATU_LOWER_BASE 0x008 > > > #define PCIE_ATU_UPPER_BASE 0x00C > > > @@ -292,6 +294,8 @@ struct dw_pcie_ob_atu_cfg { > > > int index; > > > int type; > > > u8 func_no; > > > + u8 code; > > > + u8 routing; > > > u64 cpu_addr; > > > u64 pci_addr; > > > u64 size; > > > -- > > > 2.25.1 > > > > > > > -- > > மணிவண்ணன் சதாசிவம்
