[PATCH v2 0/6] arm64: qcom: sa8775p: add support for PCIe

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Update the relavent DT bindings for PCIe, add new config to the phy
driver add pcie and phy nodes to the .dtsi file and enable then in
board .dts file for the sa8775p-ride platform.

v1 -> v2:
- correct indentationand sort compatible in qcom,pcie binding
- correct clock name entry and sort compatible in pcie-phy binding
- sort compatible and change commit message in qcom pcie driver
- change offset name, added tx2 and rx2 offsets and sort compatible
  in qmp pcie phy driver
- correct ranges property, added MSI, dma-coherent, cpu-pcie property
  removed iommus property moved pinctrl and gpio property to board dts
  and correct the allignment in pcie dtsi nodes
- added pinctrl and gpio property in board dts

Mrinmay Sarkar (6):
  dt-bindings: PCI: qcom: Add sa8775p compatible
  dt-bindings: phy: qcom,qmp: Add sa8775p QMP PCIe PHY
  PCI: qcom: Add support for sa8775p SoC
  phy: qcom-qmp-pcie: add support for sa8775p
  arm64: dts: qcom: sa8775p: Add pcie0 and pcie1 nodes
  arm64: dts: qcom: sa8775p-ride: enable pcie nodes

 .../devicetree/bindings/pci/qcom,pcie.yaml         |  28 ++
 .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml   |  19 +-
 arch/arm64/boot/dts/qcom/sa8775p-ride.dts          |  80 +++++
 arch/arm64/boot/dts/qcom/sa8775p.dtsi              | 204 +++++++++++-
 drivers/pci/controller/dwc/pcie-qcom.c             |   1 +
 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c           | 341 +++++++++++++++++++++
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h |   1 +
 .../phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v5_20.h |   2 +
 8 files changed, 673 insertions(+), 3 deletions(-)


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