On Fri, 16 Jun 2023 19:00:21 +0200, Sebastian Reichel wrote: > The PCIe 2.0 controllers on RK3588 need one additional clock, > one additional reset line and one for ranges entry. > > Signed-off-by: Sebastian Reichel <sebastian.reichel@xxxxxxxxxxxxx> > --- > .../bindings/pci/rockchip-dw-pcie.yaml | 16 +++++++++++++--- > 1 file changed, 13 insertions(+), 3 deletions(-) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
