Hello Wolfram-san,
> From: Wolfram Sang, Sent: Thursday, June 8, 2023 5:48 AM
>
> Neither RCar, nor Rcar, but R-Car.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
Thank you for the patch!
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
Best regards,
Yoshihiro Shimoda
> ---
>
> Change since V1:
> * fix typo in $subject (Thanks, Biju!)
>
> drivers/pci/controller/pcie-rcar-host.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/pcie-rcar-host.c b/drivers/pci/controller/pcie-rcar-host.c
> index e80e56b2a842..f4dac8ff97cb 100644
> --- a/drivers/pci/controller/pcie-rcar-host.c
> +++ b/drivers/pci/controller/pcie-rcar-host.c
> @@ -684,7 +684,7 @@ static void rcar_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
> }
>
> static struct irq_chip rcar_msi_bottom_chip = {
> - .name = "Rcar MSI",
> + .name = "R-Car MSI",
> .irq_ack = rcar_msi_irq_ack,
> .irq_mask = rcar_msi_irq_mask,
> .irq_unmask = rcar_msi_irq_unmask,
> @@ -813,7 +813,7 @@ static int rcar_pcie_enable_msi(struct rcar_pcie_host *host)
>
> /*
> * Setup MSI data target using RC base address address, which
> - * is guaranteed to be in the low 32bit range on any RCar HW.
> + * is guaranteed to be in the low 32bit range on any R-Car HW.
> */
> rcar_pci_write_reg(pcie, lower_32_bits(res.start) | MSIFE, PCIEMSIALR);
> rcar_pci_write_reg(pcie, upper_32_bits(res.start), PCIEMSIAUR);
> --
> 2.35.1
