On 6/7/2023 3:01 AM, Lukas Wunner wrote:
On Tue, May 30, 2023 at 11:39:47AM -0500, Mario Limonciello wrote:
+ /*
+ * It's not safe to put root ports that don't support power
+ * management into D3.
+ */
+ if (pci_pcie_type(bridge) == PCI_EXP_TYPE_ROOT_PORT &&
+ !platform_pci_power_manageable(bridge))
+ return false;
+
/*
* It should be safe to put PCIe ports from 2015 or newer
* to D3.
My recollection is that we began suspending Root Ports to D3hot because
otherwise low power states of the whole CPU package could not be reached
on certain Intel CPUs from the 2015+ era.
Do we know if the DSDT of all those systems contains the required ACPI
objects to continue runtime suspending their Root Ports after this change?
Otherwise these systems would experience a power regression.
Thanks,
Lukas
You might not have been CC'ed on my earlier patches, but
I was worried about a similar problem and at least in one
of the earlier versions was adjusting the existing
heuristic of ">= 2015" to "Intel & >= 2015".
That being said, this most recent version got R-b and A-b
tags from 3 Intel guys, I would think they cross
referenced reference systems to make that assertion before
adding tags.
