Some PCI devices have only 4K memory space size, it is normal in general machines and aligned with page size. However some architectures which support different page size, default page size on LoongArch is 16K, and ARM64 supports page size varying from 4K to 64K. On machines where larger page size is use, memory space region of two different pci devices may be in one page. It is not safe with mmu protection, also VFIO pci device driver requires base address of pci memory space page aligned, so that it can be memory mapped to qemu user space when it is passed-through to vm. It consumes more pci memory resource with page size alignment requirement, it should not be a problem on 64 bit system. Signed-off-by: Bibo Mao <maobibo@xxxxxxxxxxx> --- drivers/pci/setup-res.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index 967f9a758923..55440ae0128d 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -339,6 +339,14 @@ int pci_assign_resource(struct pci_dev *dev, int resno) return -EINVAL; } +#ifdef CONFIG_64BIT + /* + * force minimum page alignment for vfio pci usage + * supposing there is enough pci memory resource on 64bit system + */ + if (res->flags & IORESOURCE_MEM) + align = max_t(resource_size_t, PAGE_SIZE, align); +#endif size = resource_size(res); ret = _pci_assign_resource(dev, resno, size, align); -- 2.27.0
