On Thu, May 25, 2023 at 04:35:12PM +0800, Owen Yang wrote:
> Implement this workaround until Qualcomm fixed the
> correct NVMe suspend process.
>
> Signed-off-by: Owen Yang <ecs.taipeikernel@xxxxxxxxx>
> ---
>
> drivers/pci/quirks.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index f4e2a88729fd..b57876dc2624 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -5945,6 +5945,16 @@ static void nvidia_ion_ahci_fixup(struct pci_dev *pdev)
> }
> DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x0ab8, nvidia_ion_ahci_fixup);
>
> +/* In Qualcomm 7c gen 3 sc7280 platform. Some of the SSD won't enter
> + * the correct ASPM state properly. Therefore. Implement this workaround
> + * until Qualcomm fixed the correct NVMe suspend process*/
What is there to fix during suspend? Currently, Qcom PCIe driver just votes for
low interconnect bandwidth and keeps the resources (clocks, regulators) ON
during suspend. So there is no way the device would move to D3Cold.
Earlier Qcom reported that during suspend, link down event happens when the
resources are turned OFF without waiting for the link to enter L1ss. But as I
said above, we are _not_ turning OFF any resources.
I believe this patch is addressing an issue that is caused by an out-of-tree
patch.
- Mani
> +static void phison_suspend_fixup(struct pci_dev *pdev)
> +{
> + msleep(30);
> +}
> +DECLARE_PCI_FIXUP_SUSPEND(0x1987, 0x5013, phison_suspend_fixup);
> +DECLARE_PCI_FIXUP_SUSPEND(0x1987, 0x5015, phison_suspend_fixup);
> +
> static void rom_bar_overlap_defect(struct pci_dev *dev)
> {
> pci_info(dev, "working around ROM BAR overlap defect\n");
> --
> 2.17.1
>
--
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