Re: [PATCH v4 2/2] PCI: Don't assume root ports from > 2015 are power manageable

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On 5/25/2023 11:03 AM, Sathyanarayanan Kuppuswamy wrote:

On 5/24/23 12:07 PM, Mario Limonciello wrote:

This looks like a generic fix to me. So why talk about > 2015? IMO,
you can remove > 2015 from the title.
The issue was caused by the >2015 heuristic.  If that's taken
out then it went away.  But yes; I agree with you.  If I need
to respin I'll remove this.
Using a USB keyboard or mouse to wakeup the system from s2idle fails when
that XHCI device is connected to a USB-C port for an AMD USB4 router.

Due to commit 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend")
all PCIe ports go into D3 during s2idle.

When specific root ports are put into D3 over s2idle on some AMD platforms
it is not possible for the platform to properly identify wakeup sources.
This happens whether the root port goes into D3hot or D3cold.
I think Linux/Windows comparison is also not needed. But it is up to you.
I think up to Bjorn :)
Comparing registers between Linux and Windows 11 this behavior to put
these specific root ports into D3 at suspend is unique to Linux. On an
affected system Windows does not put those specific root ports into D3
over Modern Standby.

Windows doesn't put the root ports into D3 because root ports are not
power manageable.

Linux shouldn't assume root ports support D3 just because they're on a
machine newer than 2015, the ports should also be deemed power manageable.
Add an extra check explicitly for root ports to ensure D3 isn't selected
for these ports.

Other than above suggestions, rest looks good to me.

Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx>
Much appreciated!
Fixes: 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend")
Reported-by: Iain Lane <iain@xxxxxxxxxxxxxxxxxxx>
Closes: https://forums.lenovo.com/t5/Ubuntu/Z13-can-t-resume-from-suspend-with-external-USB-keyboard/m-p/5217121
Signed-off-by: Mario Limonciello <mario.limonciello@xxxxxxx>
---
v3->v4:
  * Move after refactor
---
  drivers/pci/pci.c | 8 ++++++++
  1 file changed, 8 insertions(+)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index d1fa040bcea7..d293db963327 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3015,6 +3015,14 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge)
  	if (dmi_check_system(bridge_d3_blacklist))
  		return false;
+ /*
+	 * It's not safe to put root ports that don't support power
+	 * management into D3.
+	 */
+	if (pci_pcie_type(bridge) == PCI_EXP_TYPE_ROOT_PORT &&
+	    !platform_pci_power_manageable(bridge))
+		return false;
+
  	/*
  	 * It should be safe to put PCIe ports from 2015 or newer
  	 * to D3.



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