On Tue, May 16, 2023 at 09:01:09PM +0800, Shuai Xue wrote:
> ...
> +#include <linux/pci.h>
> +#include <linux/bitfield.h>
> +#include <linux/bitops.h>
> +#include <linux/cpuhotplug.h>
> +#include <linux/cpumask.h>
> +#include <linux/device.h>
> +#include <linux/errno.h>
> +#include <linux/kernel.h>
> +#include <linux/list.h>
> +#include <linux/perf_event.h>
> +#include <linux/platform_device.h>
> +#include <linux/smp.h>
> +#include <linux/sysfs.h>
> +#include <linux/types.h>
Typically in alpha order.
> +#define DWC_PCIE_VSEC_RAS_DES_ID 0x02
> +
> +#define DWC_PCIE_EVENT_CNT_CTL 0x8
Add a blank line here.
> +/*
> + * Event Counter Data Select includes two parts:
> +#define DWC_PCIE_EVENT_CNT_DATA 0xC
> +#define DWC_PCIE_DURATION_4US 0xff
...
Pick upper-case hex or lower-case hex and use consistently.
> +#define DWC_PCIE_LANE_EVENT_MAX_PERIOD (GENMASK_ULL(31, 0))
> +#define DWC_PCIE_TIME_BASED_EVENT_MAX_PERIOD (GENMASK_ULL(63, 0))
Unnecessary outer "()".
> +struct dwc_pcie_pmu {
> + struct pci_dev *pdev; /* Root Port device */
> + u32 ras_des; /* RAS DES capability offset */
u16 is enough to address all of config space.
