On 4/13/23 3:16 AM, Mika Westerberg wrote: > If the Root/Downstream Port supports active link reporting we can check > if the link is trained before waiting for the device to respond. If the > link is not trained, there is no point waiting for the whole ~60s so > bail out early in that case. > > Signed-off-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx> > --- Looks good to me. Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx> > As discussed in the email thread of the previous version here: > > https://lore.kernel.org/linux-pci/20230404052714.51315-1-mika.westerberg@xxxxxxxxxxxxxxx/ > > This adds the last change on top of > > https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/log/?h=reset > > > drivers/pci/pci.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index 0b4f3b08f780..61bf8a4b2099 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -5037,6 +5037,22 @@ int pci_bridge_wait_for_secondary_bus(struct pci_dev *dev, char *reset_type) > } > } > > + /* > + * Everything above is handling the delays mandated by the PCIe r6.0 > + * sec 6.6.1. > + * > + * If the port supports active link reporting we now check one more > + * time if the link is active and if not bail out early with the > + * assumption that the device is not present anymore. > + */ > + if (dev->link_active_reporting) { > + u16 status; > + > + pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &status); > + if (!(status & PCI_EXP_LNKSTA_DLLLA)) > + return -ENOTTY; > + } > + > return pci_dev_wait(child, reset_type, > PCIE_RESET_READY_POLL_MS - delay); > } -- Sathyanarayanan Kuppuswamy Linux Kernel Developer
