Hi, On Tue, Apr 11, 2023 at 05:40:14PM -0500, Bjorn Helgaas wrote: > On Tue, Apr 04, 2023 at 08:27:12AM +0300, Mika Westerberg wrote: > > Hi all, > > > > This series first increases the time we wait on resume path to > > accommondate certain device, as reported in [1], and then "optimizes" > > the timeout for slow links to avoid too long waits if a device is > > disconnected during suspend. > > > > Previous version can be found here: > > > > https://lore.kernel.org/linux-pci/20230321095031.65709-1-mika.westerberg@xxxxxxxxxxxxxxx/ > > > > Changes from the previous version: > > > > * Split the patch into two: one that increases the resume timeout (on > > all links, I was not able to figure out a simple way to limit this > > only for the fast links) and the one that decreases the timeout on > > slow links. > > > > * Use dev->link_active_reporting instead of speed to figure out slow > > vs. fast links. > > > > [1] https://bugzilla.kernel.org/show_bug.cgi?id=216728 > > > > Mika Westerberg (2): > > PCI/PM: Increase wait time after resume > > I applied the above to pci/reset for v6.4. Thanks! > > PCI/PM: Decrease wait time for devices behind slow links > > Part of this patch is removing the pci_bridge_wait_for_secondary_bus() > timeout parameter, since all callers now supply the same value > (PCIE_RESET_READY_POLL_MS). I extracted that part out and applied it > as well. > > I'm hoping we can restructure the rest of this as mentioned in the > thread. If that's not possible, can you rebase what's left on top of > this? > > https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/log/?h=reset Sure. The end result is below. I did not add the wait_for_link_active() because we already have the pcie_wait_for_link_delay(), and the msleep(100) really needs to be msleep(delay) because we extract that 'delay' from the device d3cold_delay which can be more than 100 ms. Let me know what you think. I will send a proper patch tomorrow if no objections. diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 0b4f3b08f780..61bf8a4b2099 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -5037,6 +5037,22 @@ int pci_bridge_wait_for_secondary_bus(struct pci_dev *dev, char *reset_type) } } + /* + * Everything above is handling the delays mandated by the PCIe r6.0 + * sec 6.6.1. + * + * If the port supports active link reporting we now check one more + * time if the link is active and if not bail out early with the + * assumption that the device is not present anymore. + */ + if (dev->link_active_reporting) { + u16 status; + + pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &status); + if (!(status & PCI_EXP_LNKSTA_DLLLA)) + return -ENOTTY; + } + return pci_dev_wait(child, reset_type, PCIE_RESET_READY_POLL_MS - delay); }
