Hi Jim, Jim Quinlan <jim2101024@xxxxxxxxx> (2023-04-11): > Since the STB PCIe HW will cause a CPU abort on a PCIe transaction > completion timeout abort, we might as well extend the default timeout > limit. Further, different devices and systems may requires a larger or > smaller amount commensurate with their L1SS exit time, so the property > "brcm,completion-abort-us" may be used to set a custom timeout value. ^^^^^^^^^^^^^^^^^^^^^^^^ > + ret = of_property_read_u32(pcie->np, "brcm,completion-timeout-us", > + &timeout_us); > + if (ret && ret != -EINVAL) > + dev_err(pcie->dev, "malformed/invalid 'brcm,completion-timeout-us'\n"); v2 renames brcm,completion-abort-msecs into brcm,completion-timeout-us but the commit message mentions the half-way brcm,completion-abort-us property instead. (Also spotted “immplementation” in 2/3 but I thought I'd spare everyone an extra mail.) Cheers, -- Cyril Brulebois (kibi@xxxxxxxxxx) <https://debamax.com/> D-I release manager -- Release team member -- Freelance Consultant
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