[PATCH] PCI: mediatek: increase link training timeout

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Some PCI devices fail to complete link training in 100ms.
Increase link training timeout by 20ms to 120ms.

Signed-off-by: Oskari Lemmela <oskari@xxxxxxxxxxx>
---
 drivers/pci/controller/pcie-mediatek.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
index ae5ad05ddc1d..67b8cf0dc9f7 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -720,10 +720,10 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
 	if (soc->need_fix_device_id)
 		writew(soc->device_id, port->base + PCIE_CONF_DEVICE_ID);
 
-	/* 100ms timeout value should be enough for Gen1/2 training */
+	/* 120ms timeout value should be enough for Gen1/2 training */
 	err = readl_poll_timeout(port->base + PCIE_LINK_STATUS_V2, val,
 				 !!(val & PCIE_PORT_LINKUP_V2), 20,
-				 100 * USEC_PER_MSEC);
+				 120 * USEC_PER_MSEC);
 	if (err)
 		return -ETIMEDOUT;
 
@@ -785,10 +785,10 @@ static int mtk_pcie_startup_port(struct mtk_pcie_port *port)
 	val &= ~PCIE_PORT_PERST(port->slot);
 	writel(val, pcie->base + PCIE_SYS_CFG);
 
-	/* 100ms timeout value should be enough for Gen1/2 training */
+	/* 120ms timeout value should be enough for Gen1/2 training */
 	err = readl_poll_timeout(port->base + PCIE_LINK_STATUS, val,
 				 !!(val & PCIE_PORT_LINKUP), 20,
-				 100 * USEC_PER_MSEC);
+				 120 * USEC_PER_MSEC);
 	if (err)
 		return -ETIMEDOUT;
 
-- 
2.34.1




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