Most of the PCIe controllers require iommu support to function properly. So let's add the "iommu-map" property that specifies the SMMU SID of the PCIe devices to the binding. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 92eb273581f6..55ee86facbc0 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -70,6 +70,8 @@ properties: dma-coherent: true + iommu-map: true + interconnects: maxItems: 2 -- 2.25.1