Re: [PATCH 15/19] dt-bindings: PCI: qcom: Add "mhi" register region to supported SoCs

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On Mon, Mar 06, 2023 at 09:02:18PM +0530, Manivannan Sadhasivam wrote:
> "mhi" register region contains the MHI registers that could be used by
> the PCIe controller drivers to get debug information like PCIe link
> transition counts on newer SoCs.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> ---
>  Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index fb32c43dd12d..2de6e7154025 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -44,11 +44,11 @@ properties:
>  
>    reg:
>      minItems: 4
> -    maxItems: 5
> +    maxItems: 6
>  
>    reg-names:
>      minItems: 4
> -    maxItems: 5
> +    maxItems: 6
>  
>    interrupts:
>      minItems: 1
> @@ -185,10 +185,12 @@ allOf:
>        properties:
>          reg:
>            minItems: 4
> -          maxItems: 4
> +          maxItems: 5
>          reg-names:
> +          minItems: 4
>            items:
>              - const: parf # Qualcomm specific registers
> +            - const: mhi # MHI registers

You need to add the new (optional) registers at the end.

>              - const: dbi # DesignWare PCIe registers
>              - const: elbi # External local bus interface registers
>              - const: config # PCIe configuration space

Johan



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