On Wed, 1 Mar 2023, H. Peter Anvin wrote: > >> The Intel 82378ZB System I/O (SIO) and 82379AB System I/O APIC (SIO.A) > >> ISA bridges implement PCI interrupt steering with a PIRQ router[1][2] > >> that is exactly the same as that of the PIIX and ICH southbridges (or > >> actually the other way round, given that the SIO ASIC was there first). > > > > Ping for: > ><https://lore.kernel.org/lkml/alpine.DEB.2.21.2301081956290.65308@xxxxxxxxxxxxxxxxx/>. > > > > I think the patch is fairly obvious. Are there any outstanding concerns > >that prevent it from being applied? > > Has this patch been actually tested on a real machine, or is it purely > theoretical? I have no way to verify it on real x86 hw, my only SIO southbridge is in a DEC Alpha machine, so not relevant. This is I believe the final Intel device we're missing PIRQ support for, and this work was prompted by a user having issues with his network card, which ultimately and with a lot of confusion around I was able to narrow down to missing PIRQ support rather than any actual issue with hardware. At least Nikolai was patient enough to go through all this and I was vigilant enough to actually catch the ongoing discussion on netdev in the flood. See: <https://lore.kernel.org/netdev/60B24AC2.9050505@xxxxxxxxx/>. I'd rather we did not frustrate someone else with something as trivial again, but if you think it's not enough for justification to merge this change, then I'll accept it. I'd like such a decision to be explicitly stated though rather than assumed by the loss of the patch in mailing list noise (I know we're all overloaded with such stuff). Thank your for your input. Maciej
