Hi Clément, Hi Lizhi, On 1/19/23 21:02, Lizhi Hou wrote: > This patch series introduces OF overlay support for PCI devices which > primarily addresses two use cases. First, it provides a data driven method > to describe hardware peripherals that are present in a PCI endpoint and > hence can be accessed by the PCI host. Second, it allows reuse of a OF > compatible driver -- often used in SoC platforms -- in a PCI host based > system. > > There are 2 series devices rely on this patch: > > 1) Xilinx Alveo Accelerator cards (FPGA based device) > 2) Microchip LAN9662 Ethernet Controller > Digging back through some history: > Please see: https://lore.kernel.org/lkml/20220427094502.456111-1-clement.leger@xxxxxxxxxxx/ (I am selectively pulling two fragments, see the above link for the full email.) Includes the following: A driver using this support was added and can be seen at [3]. This driver embeds a builtin overlay and applies it to the live tree using of_overlay_fdt_apply_to_node(). An interrupt driver is also included and and This series was tested on a x86 kernel using CONFIG_OF under a virtual machine using PCI passthrough. Link: [1] https://lore.kernel.org/lkml/YhQHqDJvahgriDZK@xxxxxxx/t/ Link: [2] https://lore.kernel.org/lkml/20220408174841.34458529@xxxxxxxxx/T/ Link: [3] https://github.com/clementleger/linux/tree/lan966x/of_support Following link 3 to see how the driver implemented the concept, I arrived at a git tree, with the commit be42efa "mfd: lan966x: add pci driver", and have been looking at the code there. Clément, is this still the best example of a driver implementation that would use the framework proposed in the "[PATCH V7 0/3] Generate device tree node for pci devices" patch series? And this is the driver for the device listed as item 2 above "2) Microchip LAN9662 Ethernet Controller"? -Frank > > Normally, the PCI core discovers PCI devices and their BARs using the > PCI enumeration process. However, the process does not provide a way to > discover the hardware peripherals that are present in a PCI device, and > which can be accessed through the PCI BARs. Also, the enumeration process > does not provide a way to associate MSI-X vectors of a PCI device with the > hardware peripherals that are present in the device. PCI device drivers > often use header files to describe the hardware peripherals and their > resources as there is no standard data driven way to do so. This patch > series proposes to use flattened device tree blob to describe the > peripherals in a data driven way. Based on previous discussion, using > device tree overlay is the best way to unflatten the blob and populate > platform devices. To use device tree overlay, there are three obvious > problems that need to be resolved. > > First, we need to create a base tree for non-DT system such as x86_64. A > patch series has been submitted for this: > https://lore.kernel.org/lkml/20220624034327.2542112-1-frowand.list@xxxxxxxxx/ > https://lore.kernel.org/lkml/20220216050056.311496-1-lizhi.hou@xxxxxxxxxx/ > > Second, a device tree node corresponding to the PCI endpoint is required > for overlaying the flattened device tree blob for that PCI endpoint. > Because PCI is a self-discoverable bus, a device tree node is usually not > created for PCI devices. This series adds support to generate a device > tree node for a PCI device which advertises itself using PCI quirks > infrastructure. > > Third, we need to generate device tree nodes for PCI bridges since a child > PCI endpoint may choose to have a device tree node created. > > This patch series is made up of three patches. < snip >
