Hello! On Sunday 19 February 2023 20:46:19 Lukas Wunner wrote: > [+cc Philipp] > > On Sun, Feb 19, 2023 at 06:52:21PM +0000, Maciej W. Rozycki wrote: > > On Sun, 5 Feb 2023, Maciej W. Rozycki wrote: > > > This is v6 of the change to work around a PCIe link training phenomenon > > > where a pair of devices both capable of operating at a link speed above > > > 2.5GT/s seems unable to negotiate the link speed and continues training > > > indefinitely with the Link Training bit switching on and off repeatedly > > > and the data link layer never reaching the active state. > > > > Ping for: > > <https://lore.kernel.org/linux-pci/alpine.DEB.2.21.2302022022230.45310@xxxxxxxxxxxxxxxxx/>. > > Philipp is witnessing similar issues with a Pericom PI7C9X2G404EL > switch below a Broadcom STB host controller: On some rare occasions, > when booting the system the link trains correctly at 5 GT/s and the > switch is accessible without any issues. But most of the time, > the switch is inaccessible on boot. The Broadcom STB host controller > claims not to support Link Active Reporting, but in reality has a > link status indicator in a custom register. It indicates that the > link is up, the link trains to 2.5 GT/s but the switch is inaccessible. This is interesting. Do you know which layer it indicates that is up? I can image that PCIe physical layer or data link layer is up but PCIe transaction layer not yet up and so sending config requests fail. Existence of custom register may explain that it indicates different "link up" meaning. > Due to a quirk of the Broadcom STB host controller, ECAM access to > the inaccessible switch raises an unhandled CPU exception and thus > causes a kernel panic, making the issue difficult to debug. Is this ARM Cortex A53 core and unhandled exception is asynchronous one with syndrome 0xbf000002? > The switch works fine 100% when plugged into a TI Sitara AM64 board > (contains a DesignWare-derived PCIe host controller). It is really DesignWare? I had an impression that TI uses PCIe IPs from Cadence, not from DesignWare. And Cadence controllers behave in some cases different from Designware controllers. > The switch is the same as yours, only with 4 instead of 3 ports. > Perhaps the issue you're seeing isn't specific to the ASMedia switch, > but is due to an oddity of the Pericom switch, that happens to be > triggered by the Broadcom STB host controller as well? > > I've cooked up a modified version of patch 7 in your series which > performs the link retraining in the pci-brcmstb.c driver before > performing the first access to the switch. Unfortunately it > didn't result in any kind of improvement. Next step is to hook up > a Teledyne T28 analyzer to see what's going on. Can you use Teledyne T28 for debugging this issue? Because this is something which can finally show what is happing there. I would really like to see what switch and controller are sending that they can result in such buggy and incredible state. > Thanks, > > Lukas
