> From: Lu Baolu <baolu.lu@xxxxxxxxxxxxxxx> > Sent: Friday, January 13, 2023 9:44 AM > > One alternative is ATS which lets the device resolve the PASID+addr pair > before a memory request is made into a routeable TLB address through the > TA. Those resolved addresses are then cached on the device instead of > in the IOMMU TLB and the device always sets the translated bit for PASID. > One example of those devices are AMD graphic devices that always have ACS > or ATS enabled together with PASID. this should be made clear that ATS alone doesn't imply that translated bit is always set. It's just an optimization so the device may cache translation for selective requests. Only combining with PRI to support SVA has such implication. > + * @flags: device-specific flags > + * - PCI_PASID_XLATED_REQ_ONLY: The PCI device only issues PASID > + * memory requests of translated type. this reads like the device even doesn't issue non-PASID requests. It is clearer to be "The PCI device always use translated type for all PASID memory requests". Otherwise looks good to me: Reviewed-by: Kevin Tian <kevin.tian@xxxxxxxxx>
