Hi Serge,
On Sun, Dec 11, 2022 at 06:28:49PM +0300, Serge Semin wrote:
> Hi Frank
>
> On Fri, Dec 09, 2022 at 03:52:42PM +0000, Frank Li wrote:
> > Hi Serge,
> >
> > > From: Serge Semin, Sent: Thursday, December 8, 2022 11:01 PM
> > >
> > > Cc += Frank Li
> > >
> > > @Frank could you have a look at the thread and check the content of
> > > the CSRs dbi+0x8f8 and dbi+0x978 on available to you DW PCIe +EDMA
> > > devices?
> >
>
> > [ 2.598038] imx6q-pcie 5f010000.pcie_ep: imx_add_pcie_ep: +0x8f8 = 3438302a, +0x978 = 00010001
>
> Thanks for the reply. So it's 4.80a with the legacy viewport-based
> access. Alas it isn't what we need in this thread. We'll need
> @Mani's respond in order to decide how to fix the auto-detection
> procedure.
>
Sorry for the late reply!
With below diff on the EP:
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 6f3805228a18..0eb4d3218738 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -665,6 +665,10 @@ static int dw_pcie_edma_find_chip(struct dw_pcie *pci)
if (val == 0xFFFFFFFF && pci->edma.reg_base) {
pci->edma.mf = EDMA_MF_EDMA_UNROLL;
+ dev_info(pci->dev, "%s: +0x8f8 = %08x, +0x978 = %08x\n", __func__,
+ dw_pcie_readl_dbi(pci, 0x8f8),
+ dw_pcie_readl_dbi(pci, 0x978));
+
val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL);
} else if (val != 0xFFFFFFFF) {
pci->edma.mf = EDMA_MF_EDMA_LEGACY;
The output was:
qcom-pcie-ep 1c08000.pcie-ep: dw_pcie_edma_find_chip: +0x8f8 = 3533302a, +0x978 = ffffffff
Hope this helps!
Thanks,
Mani
> -Serge(y)
>
> >
> > Frank Li
> >
> >
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