On Tue, Dec 06, 2022 at 11:56:34AM +0100, Lorenzo Pieralisi wrote:
> On Mon, Dec 05, 2022 at 10:45:30AM +0100, Johan Hovold wrote:
> > Devices on some PCIe buses may be cache coherent and must be marked as
> > such in the devicetree to avoid data corruption.
> >
> > This is specifically needed on recent Qualcomm platforms like SC8280XP.
> >
> > Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
> > ---
> >
> > Lorenzo, the corresponding SC8280XP DT fix is heading for 6.2 so it
> > would be nice if this one could be merged for 6.2-rc1 (or -rc2) as well
> > to avoid the corresponding DT validation warnings.
>
> What's the commit base for this patch ? I tried applying to my pci/dt
> branch to no avail, please let me know and I will merge it.
That should be pci/qcom which has 3a936b2a5a58 ("dt-bindings: PCI: qcom:
Add SC8280XP/SA8540P interconnects").
Johan
