Hi Thomas,
On 12/2/2022 11:51 AM, Thomas Gleixner wrote:
> On Fri, Dec 02 2022 at 09:55, Reinette Chatre wrote:
>> On 11/11/2022 5:59 AM, Thomas Gleixner wrote:
>> @@ -33,6 +34,8 @@ struct ims_slot {
>> #define CTRL_PASID_ENABLE BIT(3)
>> /* Position of PASID.LSB in the control word */
>> #define CTRL_PASID_SHIFT 12
>> +/* Valid PASID is 20 bits */
>> +#define CTRL_PASID_VALID GENMASK(19, 0)
>>
>> static inline void iowrite32_and_flush(u32 value, void __iomem *addr)
>> {
>> @@ -93,12 +96,17 @@ static void idxd_prepare_desc(struct irq_domain *domain, msi_alloc_info_t *arg,
>> /* Mask the interrupt for paranoia sake */
>> iowrite32_and_flush(CTRL_VECTOR_MASKBIT, &slot->ctrl);
>>
>> - /*
>> - * The caller provided PASID. Shift it to the proper position
>> - * and set the PASID enable bit.
>> - */
>> - desc->data.icookie.value <<= CTRL_PASID_SHIFT;
>> - desc->data.icookie.value |= CTRL_PASID_ENABLE;
>> + if (pasid_valid((ioasid_t)desc->data.icookie.value)) {
>> + /*
>> + * The caller provided PASID. Shift it to the proper position
>> + * and set the PASID enable bit.
>> + */
>> + desc->data.icookie.value &= CTRL_PASID_VALID;
>> + desc->data.icookie.value <<= CTRL_PASID_SHIFT;
>> + desc->data.icookie.value |= CTRL_PASID_ENABLE;
>> + } else {
>> + desc->data.icookie.value = 0;
>> + }
>
> Looks about right. But that needs some sanity measures at the call sites
> so that we don't end up with an invalid PASID in cases where a valid
> PASID is truly required.
I will take a closer look at this. Current call site is explicit to
set an invalid PASID when PASID use is disabled. I still need to do testing
with valid PASID to learn those flows.
Reinette
