> From: Thomas Gleixner <tglx@xxxxxxxxxxxxx> > Sent: Monday, November 21, 2022 10:38 PM > > The IMS domains have a few constraints: > > - The index space is managed by the core code. > > Device memory based IMS provides a storage array with a fixed size > which obviously requires an index. But there is no association between > index and functionality so the core can randomly allocate an index in > the array. > > Queue memory based IMS does not have the concept of an index as the > storage is somewhere in memory. In that case the index is purely > software based to keep track of the allocations. 'Queue' could be a HW queue or SW queue. Is it clearer to just use 'system memory based IMS" here? and for a GPU it is probably just a gfx context to store IMS content, w/o a queue concept.
