Re: [PATCH 08/13] PCI: Add pci_bus_extend/shrink_top()

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On Fri, Jan 27, 2012 at 6:49 PM, Yinghai Lu <yinghai@xxxxxxxxxx> wrote:
> extend or shrink bus and parent buses top (subordinate)
>
> extended range is verified safe range, and stop at recorded parent_res.
>
> Signed-off-by: Yinghai Lu <yinghai@xxxxxxxxxx>
> ---
>  drivers/pci/probe.c |   50 ++++++++++++++++++++++++++++++++++++++++++++++++++
>  1 files changed, 50 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index 55404c3..3e62f45 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -624,6 +624,56 @@ static void pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max)
>        }
>  }
>
> +static void __devinit pci_bus_extend_top(struct pci_bus *parent,
> +                resource_size_t size, struct resource *parent_res)
> +{
> +       struct resource *res;
> +
> +       if (!size)
> +               return;
> +
> +       while (parent) {
> +               res = &parent->busn_res;
> +               if (res == parent_res)
> +                       break;
> +               res->end += size;
> +               parent->subordinate += size;

This makes me nervous for the same reason as
pci_bus_update_busn_res_end() -- we're changing res->end for resources
already in a tree.  How do we know the tree remains consistent?

> +               pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS,
> +                                        parent->subordinate);
> +               dev_printk(KERN_DEBUG, &parent->dev,
> +                               "busn_res: extended %02llx to %06llx-%06llx\n",
> +                               (unsigned long long)size,
> +                               (unsigned long long)res->start,
> +                               (unsigned long long)res->end);
> +               parent = parent->parent;
> +       }
> +}
> +
> +static void __devinit pci_bus_shrink_top(struct pci_bus *parent,
> +                resource_size_t size, struct resource *parent_res)
> +{
> +       struct resource *res;
> +
> +       if (!size)
> +               return;
> +
> +       while (parent) {
> +               res = &parent->busn_res;
> +               if (res == parent_res)
> +                       break;
> +               res->end -= size;
> +               parent->subordinate -= size;
> +               pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS,
> +                                        parent->subordinate);
> +               dev_printk(KERN_DEBUG, &parent->dev,
> +                               "busn_res: shrunk %02llx to %06llx-%06llx\n",
> +                               (unsigned long long)size,
> +                               (unsigned long long)res->start,
> +                               (unsigned long long)res->end);
> +               parent = parent->parent;
> +       }
> +}
> +
>  /*
>  * If it's a bridge, configure it and scan the bus behind it.
>  * For CardBus bridges, we don't scan behind as the devices will
> --
> 1.7.7
>
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