Re: [PATCH v3 08/11] cxl/pci: add tracepoint events for CXL RAS

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On 11/18/2022 10:17 AM, Steven Rostedt wrote:
On Fri, 18 Nov 2022 10:08:49 -0700
Dave Jiang <dave.jiang@xxxxxxxxx> wrote:

+TRACE_EVENT(cxl_aer_uncorrectable_error,
+	TP_PROTO(const char *dev_name, u32 status, u32 fe, u32 *hl),
+	TP_ARGS(dev_name, status, fe, hl),
+	TP_STRUCT__entry(
+		__string(dev_name, dev_name)
+		__field(u32, status)
+		__field(u32, first_error)
+		__dynamic_array(u32, header_log, CXL_HEADERLOG_SIZE_U32)

If this is a fixed size, you do not need to use __dynamic_array, but
instead just use __array()

		__array(u32, header_log, CXL_HEADERLOG_SIZE_U32);

Thanks! I will update.


+	),
+	TP_fast_assign(
+		__assign_str(dev_name, dev_name);
+		__entry->status = status;
+		__entry->first_error = fe;
+		/*
+		 * Embed the 512B headerlog data for user app retrieval and
+		 * parsing, but no need to print this in the trace buffer.
+		 */
+		memcpy(__get_dynamic_array(header_log), hl, CXL_HEADERLOG_SIZE);

		memcpy(__entry->header_log, hl, CXL_HEADERLOG_SIZE);

This will be smaller and faster.

-- Steve


+	),
+	TP_printk("%s: status: '%s' first_error: '%s'",
+		  __get_str(dev_name),
+		  show_uc_errs(__entry->status),
+		  show_uc_errs(__entry->first_error)
+	)
+);
+



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