On Tue, 1 Nov 2022 10:57:14 +0100, Sascha Hauer wrote:
> When the PHY is the reference clock provider then it must be initialized
> and powered on before the reset on the client is deasserted, otherwise
> the link will never come up. The order was changed in cf236e0c0d59.
> Restore the correct order to make the driver work again on boards where
> the PHY provides the reference clock. This also changes the order for
> boards where the Soc is the PHY reference clock divider, but this
> shouldn't do any harm.
>
> [...]
Applied to pci/dwc, thanks!
[1/1] PCI: imx6: Initialize PHY before deasserting core reset
https://git.kernel.org/lpieralisi/pci/c/ae6b9a65af48
Thanks,
Lorenzo
