On Mon, Oct 24, 2022 at 01:43:09PM +0800, Richard Zhu wrote: > Add PCIe SYSPLL configurations, thus the internal SYSPLL can be used as > i.MX8MP PCIe reference clock. > > The following properties of PHY dts node should be changed accordingly. > - Set 'fsl,refclk-pad-mode' as '<IMX8_PCIE_REFCLK_PAD_OUTPUT>'. > - Change 'clocks' to '<&clk IMX8MP_CLK_HSIO_ROOT>'. > > Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx> Applied, thanks!
