在 2022/10/28 6:09, Bjorn Helgaas 写道:
On Thu, Oct 27, 2022 at 11:14:58AM +0800, LeoLiu-oc wrote:
From: leoliu-oc <leoliu-oc@xxxxxxxxxxx>
HEST PCIE AER error source information describes the Uncorrectable Error
Severity, CorrectableError Mask and other aer register's value to write to the
bridge's Correctable Error Mask register.
I guess the point is to extract register values from HEST PCI Express
AER structures (ACPI r6.5, sec 18.3.2.4, etc.) and program them into
AER Capabilities?
Yes, the purpose of the patch sets is to extract register values from
HEST PCI Express AER structures and program them into AER Capabilities
Thanks
leoliu-oc
leoliu-oc (5):
ACPI/APEI: Add apei_hest_parse_aer()
ACPI/APEI: remove static from apei_hest_parse()
ACPI/PCI: Add AER bits #defines for PCIE/PCI-X bridges
ACPI/PCI: Add pci_acpi_program_hest_aer_params()
ACPI/PCI: config pcie devices's aer register
If/when you repost this, it would be nice if the patches ([1/5],
[2/5], etc) were responses to the cover letter ([0/5]). Since they're
not responses, b4 doesn't know they're connected and can't grab the
whole series at once.
Also capitalize the subject lines consistently and s/PCIE/PCIe/ and
s/pcie/PCIe/ and s/aer/AER/, e.g., >
ACPI/APEI: Add apei_hest_parse_aer()
ACPI/APEI: Remove static from apei_hest_parse()
PCI: Add AER #defines for PCIe/PCI-X bridges
ACPI/PCI: Add pci_acpi_program_hest_aer_params()
ACPI/PCI: Configure devices AER registers based on HEST
Got it. I will modify this in the next version patch set.
Thanks
leoliu-oc
drivers/acpi/apei/hest.c | 121 +++++++++++++++++++++++++++++++++-
drivers/pci/pci-acpi.c | 92 ++++++++++++++++++++++++++
drivers/pci/pci.h | 5 ++
drivers/pci/probe.c | 1 +
include/acpi/actbl1.h | 69 +++++++++++++++++++
include/acpi/apei.h | 9 +++
include/uapi/linux/pci_regs.h | 5 ++
7 files changed, 300 insertions(+), 2 deletions(-)
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2.20.1