Few PCIe endpoints like NVMe and WLANs are always expecting the device to be in D0 state and the link to be active (or in l1ss) all the time (including in S3 state). This patch series adds this support for allowing the system to enter S3 state (and further low power states) with PCIe Device being in D0 state and with link being in l1ss on qcom platforms. And to get to the lowest power state on Qcom SoC, all the clocks need to be voted off. Since PCIe clocks are managed by qcom platform driver, this logic was added to the qcom platform driver. And when we turn off PCIe PHY-specific clocks, PHY may go off and along with it the link also will go down. To retain, the link state in l1ss with PHY clocks turned off, we need park PCIe PHY in the power-down state so that it can maintain the link state in l1ss with the help of the always-on power domain (aka MX). To support this PHY Power-down state PHY driver has been updated with new interface APIs. Its observed that access to Ep PCIe space to mask MSI/MSIX is happening at the very late stage of suspend path (access by affinity changes while making CPUs offline during suspend, this will happen after devices are suspended (after all phases of suspend ops)). If we turn off clocks in any PM callback, afterwards running into crashes due to un-clocked access due to above mentioned MSI/MSIx access. So, we are making use of syscore framework to turn off the PCIe clocks which will be called after making CPUs offline. During this process, The controller should remain powered on. For this made changes to GDSC. Few endpoints are taking time more time to settle the link in L1ss. So Waiting for max time of 200ms for the link to be stable in L1ss. Krishna chaitanya chundru (5): PCI: qcom: Add system suspend and resume support PCI: qcom: Add retry logic for link to be stable in L1ss phy: core: Add support for phy suspend & resume phy: qcom: Add power suspend & resume callbacks to pcie phy clk: qcom: Enabling PCIe GDSC retention drivers/clk/qcom/gcc-sc7280.c | 2 +- drivers/pci/controller/dwc/pcie-qcom.c | 163 ++++++++++++++++++++++++++++++- drivers/phy/phy-core.c | 30 ++++++ drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 50 ++++++++++ include/linux/phy/phy.h | 20 ++++ 5 files changed, 263 insertions(+), 2 deletions(-) -- 2.7.4
