Re: [PATCH v2 8/8] PCI: qcom: Sort device-id table

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On Thu, Aug 18, 2022 at 03:05:30PM -0500, Andrew Halaney wrote:
> Hi Lorenzo,
> 
> On Tue, Aug 16, 2022 at 06:06:21PM +0200, Lorenzo Pieralisi wrote:
> > On Fri, Jul 15, 2022 at 09:43:36AM +0200, Johan Hovold wrote:
> > > On Thu, Jul 14, 2022 at 10:27:23AM -0400, Brian Masney wrote:
> > > > On Thu, Jul 14, 2022 at 09:13:48AM +0200, Johan Hovold wrote:
> > > > > Sort the device-id table entries alphabetically by compatible string to
> > > > > make it easier to find entries and add new ones.
> > > > > 
> > > > > Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
> > > > > ---
> > > > >  drivers/pci/controller/dwc/pcie-qcom.c | 12 ++++++------
> > > > >  1 file changed, 6 insertions(+), 6 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> > > > > index 8dddb72f8647..fea921cca8fa 100644
> > > > > --- a/drivers/pci/controller/dwc/pcie-qcom.c
> > > > > +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> > > > > @@ -1749,24 +1749,24 @@ static int qcom_pcie_remove(struct platform_device *pdev)
> > > > >  }
> > > > >  
> > > > >  static const struct of_device_id qcom_pcie_match[] = {
> > > > > +	{ .compatible = "qcom,pcie-apq8064", .data = &cfg_2_1_0 },
> > > > >  	{ .compatible = "qcom,pcie-apq8084", .data = &cfg_1_0_0 },
> > > > > +	{ .compatible = "qcom,pcie-ipq6018", .data = &cfg_2_9_0 },
> > > > >  	{ .compatible = "qcom,pcie-ipq8064", .data = &cfg_2_1_0 },
> > > > >  	{ .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 },
> > > > > -	{ .compatible = "qcom,pcie-apq8064", .data = &cfg_2_1_0 },
> > > > > -	{ .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 },
> > > > >  	{ .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 },
> > > > >  	{ .compatible = "qcom,pcie-ipq4019", .data = &cfg_2_4_0 },
> > > > 
> > > > qcom,pcie-ipq4019 should be moved up above qcom,pcie-ipq6018.
> > > 
> > > If we only had some sort of machine that could sort strings for us... ;)
> > > I'll rely on vim for this from now on.
> > > 
> > > Perhaps Bjorn H can fix that up when applying unless I'll be sending a
> > > v3 for some other reason. This series still depends on the MSI rework to
> > > be applied first.
> > 
> > I can do it while applying. A link to the lore archive for the MSI
> > rework please (I don't think it was merged for v6.0) ? I was away for
> > two months, catching up with threads.
> 
> I don't see a reply to this, so here I am following up out of interest
> for getting this in mainline for my x13s laptop to use.
> 
> It appears the MSI rework[0] (which is in the cover letter here so I
> know I grabbed the right thing) was applied in 6.0:
> 
>     ahalaney@halaneylaptop ~/git/linux (git)-[remotes/upstream/HEAD] % git log --oneline --abbrev=12 --grep=2436629 v6.0-rc1 -- drivers/pci/controller/dwc/ 
>     cd761378e62c PCI: dwc: Handle MSIs routed to multiple GIC interrupts
>     db388348acff PCI: dwc: Convert struct pcie_port.msi_irq to an array
>     226ec087497a PCI: dwc: Split MSI IRQ parsing/allocation to a separate function
>     3c62f878a969 PCI: dwc: Correct msi_irq condition in dw_pcie_free_msi()
>     ahalaney@halaneylaptop ~/git/linux (git)-[remotes/upstream/HEAD] %
> 
> Just a friendly FYI, hope that helps!

Thanks for the heads-up, I will merge this series then.

Lorenzo

> [0] https://lore.kernel.org/all/20220707134733.2436629-6-dmitry.baryshkov@xxxxxxxxxx/
> 
> Thanks,
> Andrew
> 
> > 
> > Thanks,
> > Lorenzo
> > 
> > > Thanks for reviewing.
> > > 
> > > Johan
> 



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