Hi Maintainers, Gentle ping for this patch, if there is anything I need to modify, please kindly let me know. Thanks. On Tue, 2022-08-02 at 20:06 +0800, Jianjun Wang wrote: > MT8188 and MT8195 are ARM platform SoCs with the same PCIe IP as > MT8192. > > Also add new clock name "peri_mem" since the MT8188 and MT8195 use > clock > "peri_mem" instead of "top_133m". > > Signed-off-by: Jianjun Wang <jianjun.wang@xxxxxxxxxxxx> > --- > Changes in v4: > Remove "items" for "mediatek,mt8192-pcie" since it only have one > item. > > Changes in v3: > Use enum property to add the new clock name. > > Changes in v2: > Merge two patches into one. > --- > .../devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 13 > +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie- > gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie- > gen3.yaml > index 0499b94627ae..c00be39af64e 100644 > --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > @@ -48,7 +48,13 @@ allOf: > > properties: > compatible: > - const: mediatek,mt8192-pcie > + oneOf: > + - items: > + - enum: > + - mediatek,mt8188-pcie > + - mediatek,mt8195-pcie > + - const: mediatek,mt8192-pcie > + - const: mediatek,mt8192-pcie > > reg: > maxItems: 1 > @@ -84,7 +90,9 @@ properties: > - const: tl_96m > - const: tl_32k > - const: peri_26m > - - const: top_133m > + - enum: > + - top_133m # for MT8192 > + - peri_mem # for MT8188/MT8195 > > assigned-clocks: > maxItems: 1 > @@ -126,6 +134,7 @@ required: > - interrupts > - ranges > - clocks > + - clock-names > - '#interrupt-cells' > - interrupt-controller >
