On Mon, Aug 01, 2022 at 03:06:06PM -0500, Bjorn Helgaas wrote:
> On Mon, Aug 01, 2022 at 06:42:19PM +0530, Manivannan Sadhasivam wrote:
> > On Fri, Jun 24, 2022 at 05:39:36PM +0300, Serge Semin wrote:
> > > Since DWC PCIe v4.70a the controller version and version type can be read
> > > from the PORT_LOGIC.PCIE_VERSION_OFF and PORT_LOGIC.PCIE_VERSION_TYPE_OFF
> > > registers respectively. Seeing the generic code has got version-dependent
> > > parts let's use these registers to find out the controller version. The
> > > detection procedure is executed for both RC and EP modes right after the
> > > platform-specific initialization. We can't do that earlier since the
> > > glue-drivers can perform the DBI-related setups there including the bus
> > > reference clocks activation, without which the CSRs just can't be read.
> > >
> > > Note the CSRs content is zero on the older DWC PCIe controller. In that
> > > case we have no choice but to rely on the platform setup.
> > >
> > > Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx>
> >
> > Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> >
> > > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
>
> > > @@ -711,6 +711,8 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep)
> > > ep->phys_base = res->start;
> > > ep->addr_size = resource_size(res);
> > >
> > > + dw_pcie_version_detect(pci);
> > > +
> >
> > There is still an ongoing debate about moving all DBI accesses to
> > init_complete. But this is fine atm.
>
> Well, if I understand it correctly, e966f7390da9 ("PCI: dwc: Refactor
> core initialization code for EP mode") claims that all DBI accesses
> should be in dw_pcie_ep_init_complete(), so it's not so much a debate
> as a discussion about how best to achieve that.
>
Glad to know that we are on the same page. Let's continue the discussion in
that thread.
Thanks,
Mani
> But you're right, we can fix that up later if necessary.
>
> > > dw_pcie_iatu_detect(pci);
--
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