Bjorn Helgaas <helgaas@xxxxxxxxxx> writes: > On Wed, Jul 06, 2022 at 12:10:43PM +0200, Pali Rohár wrote: >> By default old pre-3.0 Freescale PCIe controllers reports invalid PCI Class >> Code 0x0b20 for PCIe Root Port. It can be seen by lspci -b output on P2020 >> board which has this pre-3.0 controller: >> >> $ lspci -bvnn >> 00:00.0 Power PC [0b20]: Freescale Semiconductor Inc P2020E [1957:0070] (rev 21) >> !!! Invalid class 0b20 for header type 01 >> Capabilities: [4c] Express Root Port (Slot-), MSI 00 >> >> Fix this issue by programming correct PCI Class Code 0x0604 for PCIe Root >> Port to the Freescale specific PCIe register 0x474. >> >> With this change lspci -b output is: >> >> $ lspci -bvnn >> 00:00.0 PCI bridge [0604]: Freescale Semiconductor Inc P2020E [1957:0070] (rev 21) (prog-if 00 [Normal decode]) >> Capabilities: [4c] Express Root Port (Slot-), MSI 00 >> >> Without any "Invalid class" error. So class code was properly reflected >> into standard (read-only) PCI register 0x08. >> >> Same fix is already implemented in U-Boot pcie_fsl.c driver in commit: >> http://source.denx.de/u-boot/u-boot/-/commit/d18d06ac35229345a0af80977a408cfbe1d1015b >> >> Fix activated by U-Boot stay active also after booting Linux kernel. >> But boards which use older U-Boot version without that fix are affected and >> still require this fix. >> >> So implement this class code fix also in kernel fsl_pci.c driver. >> >> Cc: stable@xxxxxxxxxxxxxxx >> Signed-off-by: Pali Rohár <pali@xxxxxxxxxx> > > I assume the powerpc folks will take care of this. Will do. cheers
