On 14-07-22, 18:59, Wangseok Lee wrote: > On 07-07-22, 01:52, Vinod Koul wrote: > > On 06-07-22, 17:10, Wangseok Lee wrote: > Sorry for late reply. > > Above all, the IP blocks of phy-exynos-pcie.c and artpec8's pcie phy are > different. As a result, the H/W architecture and operation sequence is > very different. So it is very difficult to merge into a exynos pcie file. > If possible, we would like to proceed with a new file. Is that possible? Okay lets try that -- ~Vinod
