Am Freitag, dem 01.07.2022 um 11:25 +0800 schrieb Richard Zhu: > Let the driver probe successfully, return zero in imx6_pcie_start_link() > when PCIe link is down. > > Link: https://lore.kernel.org/r/1655189942-12678-7-git-send-email-hongxing.zhu@xxxxxxx > Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx> > Signed-off-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx> Reviewed-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx> > --- > drivers/pci/controller/dwc/pci-imx6.c | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 0b168f0d57b8..e236f824c808 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -836,7 +836,9 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) > /* Start LTSSM. */ > imx6_pcie_ltssm_enable(dev); > > - dw_pcie_wait_for_link(pci); > + ret = dw_pcie_wait_for_link(pci); > + if (ret) > + goto err_reset_phy; > > if (pci->link_gen == 2) { > /* Allow Gen2 mode after the link is up. */ > @@ -872,7 +874,9 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) > } > > /* Make sure link training is finished as well! */ > - dw_pcie_wait_for_link(pci); > + ret = dw_pcie_wait_for_link(pci); > + if (ret) > + goto err_reset_phy; > } else { > dev_info(dev, "Link: Gen2 disabled\n"); > } > @@ -886,7 +890,7 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) > dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0), > dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1)); > imx6_pcie_reset_phy(imx6_pcie); > - return ret; > + return 0; > } > > static int imx6_pcie_host_init(struct pcie_port *pp)
