Am Freitag, dem 01.07.2022 um 11:25 +0800 schrieb Richard Zhu:
> From: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
>
> Move imx6_pcie_grp_offset() and imx6_pcie_configure_type() earlier in the
> file since they depend on nothing and are used by several other functions
> that will be moved earlier. No functional change intended.
>
> Signed-off-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
> Acked-by: Richard Zhu <hongxing.zhu@xxxxxxx>
Reviewed-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 50 +++++++++++++--------------
> 1 file changed, 25 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 7a285fb0f619..8653ca8cbfb9 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -146,6 +146,31 @@ struct imx6_pcie {
> #define PHY_RX_OVRD_IN_LO_RX_DATA_EN BIT(5)
> #define PHY_RX_OVRD_IN_LO_RX_PLL_EN BIT(3)
>
> +static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie)
> +{
> + WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ &&
> + imx6_pcie->drvdata->variant != IMX8MM);
> + return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14;
> +}
> +
> +static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie)
> +{
> + unsigned int mask, val;
> +
> + if (imx6_pcie->drvdata->variant == IMX8MQ &&
> + imx6_pcie->controller_id == 1) {
> + mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE;
> + val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE,
> + PCI_EXP_TYPE_ROOT_PORT);
> + } else {
> + mask = IMX6Q_GPR12_DEVICE_TYPE;
> + val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE,
> + PCI_EXP_TYPE_ROOT_PORT);
> + }
> +
> + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val);
> +}
> +
> static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool exp_val)
> {
> struct dw_pcie *pci = imx6_pcie->pci;
> @@ -415,13 +440,6 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
> imx6_pcie->gpio_active_high);
> }
>
> -static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie)
> -{
> - WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ &&
> - imx6_pcie->drvdata->variant != IMX8MM);
> - return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14;
> -}
> -
> static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
> {
> struct dw_pcie *pci = imx6_pcie->pci;
> @@ -617,24 +635,6 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
> }
> }
>
> -static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie)
> -{
> - unsigned int mask, val;
> -
> - if (imx6_pcie->drvdata->variant == IMX8MQ &&
> - imx6_pcie->controller_id == 1) {
> - mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE;
> - val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE,
> - PCI_EXP_TYPE_ROOT_PORT);
> - } else {
> - mask = IMX6Q_GPR12_DEVICE_TYPE;
> - val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE,
> - PCI_EXP_TYPE_ROOT_PORT);
> - }
> -
> - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val);
> -}
> -
> static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
> {
> switch (imx6_pcie->drvdata->variant) {
