This series try to push an uio driver which works on freescale mpc85xx to configure its l2-cache-sram as a block of SRAM and enable user level application access of the SRAM. 1/2: For coding-style consideration of macro CONFIG_HAVE_IOREMAP_PORT; 2/2: Implementation of the uio driver. This is the second version, which addressed some commets: 1. Use __be32 instead of u32 for the big-endian data declarations; 2. Remove "static inline" version of generic_access_phys definition in .h file and give a version of no-op definition in mm/memory.c; 3. Use generic ioremap_cache instead of ioremap_coherent For v1, see: 1/2: https://lore.kernel.org/all/20220610144348.GA595923@bhelgaas/T/ 2/2: https://lore.kernel.org/lkml/YqHy1uXwCLlJmftr@xxxxxxxxx/ Wang Wenhu (2): mm: eliminate ifdef of HAVE_IOREMAP_PROT in .c files uio:powerpc:mpc85xx: l2-cache-sram uio driver implementation drivers/char/mem.c | 2 - drivers/fpga/dfl-afu-main.c | 2 - drivers/pci/mmap.c | 2 - drivers/uio/Kconfig | 14 ++ drivers/uio/Makefile | 1 + drivers/uio/uio.c | 2 - drivers/uio/uio_fsl_85xx_cache_sram.c | 288 ++++++++++++++++++++++++++ mm/memory.c | 13 +- 8 files changed, 312 insertions(+), 12 deletions(-) create mode 100644 drivers/uio/uio_fsl_85xx_cache_sram.c -- 2.25.1
