On Mon, Jun 13, 2022 at 04:55:37PM +0800, Richard Zhu wrote:
> let the driver probe successfully, return zero in imx6_pcie_start_link()
> when PCIe link is down.
>
> Because i.MX PCIe doesn't support hot-plug feature.
> In this link down scenario, only start the PCIe link training in resume
> when the link is up before system suspend to avoid the long latency in
> the link training period.
This looks like two changes that should be separate patches:
1) Make driver probe successful even if link is down.
2) Reduce resume time by only starting the link if it was up before
suspend.
> Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 18 +++++++++++-------
> 1 file changed, 11 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index c02748393aac..ac6ec2d691a0 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -67,6 +67,7 @@ struct imx6_pcie {
> struct dw_pcie *pci;
> int reset_gpio;
> bool gpio_active_high;
> + bool link_is_up;
> struct clk *pcie_bus;
> struct clk *pcie_phy;
> struct clk *pcie_inbound_axi;
> @@ -845,7 +846,9 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> /* Start LTSSM. */
> imx6_pcie_ltssm_enable(dev);
>
> - dw_pcie_wait_for_link(pci);
> + ret = dw_pcie_wait_for_link(pci);
> + if (ret)
> + goto err_reset_phy;
>
> if (pci->link_gen == 2) {
> /* Allow Gen2 mode after the link is up. */
> @@ -881,11 +884,14 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> }
>
> /* Make sure link training is finished as well! */
> - dw_pcie_wait_for_link(pci);
> + ret = dw_pcie_wait_for_link(pci);
> + if (ret)
> + goto err_reset_phy;
> } else {
> dev_info(dev, "Link: Gen2 disabled\n");
> }
>
> + imx6_pcie->link_is_up = true;
> tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA);
> dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS);
> return 0;
> @@ -895,7 +901,7 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
> dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
> imx6_pcie_reset_phy(imx6_pcie);
> - return ret;
> + return 0;
> }
>
> static int imx6_pcie_host_init(struct pcie_port *pp)
> @@ -1022,10 +1028,8 @@ static int imx6_pcie_resume_noirq(struct device *dev)
> imx6_pcie_init_phy(imx6_pcie);
> imx6_pcie_deassert_core_reset(imx6_pcie);
> dw_pcie_setup_rc(pp);
> -
> - ret = imx6_pcie_start_link(imx6_pcie->pci);
> - if (ret < 0)
> - dev_info(dev, "pcie link is down after resume.\n");
> + if (imx6_pcie->link_is_up)
> + imx6_pcie_start_link(imx6_pcie->pci);
>
> return 0;
> }
> --
> 2.25.1
>
>
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