On Mon, 16 May 2022 15:52:17 +0530, Bharat Kumar Gogada wrote:
> All existing vendor DTSes are using "cpm_slcr" reg followed by "cfg" reg.
>
> This order is also suggested by node name which is pcie@fca10000 which
> suggests that cpm_slcr register should be the first.
>
> Driver itself is using devm_platform_ioremap_resource_byname() for both
> names that's why there is no functional change even on description which
> are using current order.
>
> But still prefer to change order to cover currently used description.
> Fixes: e22fadb1d014 ("PCI: xilinx-cpm: Add YAML schemas for Versal CPM Root Port")
>
> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xxxxxxxxxx>
> ---
> .../devicetree/bindings/pci/xilinx-versal-cpm.yaml | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
Applied, thanks!
