On 11/09/2011 11:40 PM, Kenji Kaneshige wrote: > We need to wait for 1000 ms after Data Link Layer Link Active (DLLLA) > bit reads 1b before sending configuration request. Currently pciehp > does this wait after checking Link Training (LT) bit. But we need it > before checking LT bit because LT is still set even after DLLLA bit is > set on some platforms. > > Signed-off-by: Kenji Kaneshige <kaneshige.kenji@xxxxxxxxxxxxxx> Acked-by: Yinghai Lu <yinghai@xxxxxxxxxx> Tested-by: Yinghai Lu <yinghai@xxxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
