On Fri, 13 May 2022 at 10:41, Johan Hovold <johan@xxxxxxxxxx> wrote: > > On Thu, May 12, 2022 at 08:29:04PM +0300, Dmitry Baryshkov wrote: > > PCIe pipe clk (and some other clocks) must be parked to the "safe" > > source (bi_tcxo) when corresponding GDSC is turned off and on again. > > Currently this is handcoded in the PCIe driver by reparenting the > > gcc_pipe_N_clk_src clock. > > > > Instead of doing it manually, follow the approach used by > > clk_rcg2_shared_ops and implement this parking in the enable() and > > disable() clock operations for respective pipe clocks. > > > > PCIe part depends on [1]. > > This one was merged a month ago. It is not in Linus's tree (only in Lorenzo's one). So anybody wishing to test the series would still have to pick it up manually. > > > Changes since v4: > > - Renamed the clock to clk-regmap-pipe-src, > > - Added mention of PCIe2 PHY to the commit message, > > - Expanded commit messages to mention additional pipe clock details. > > > > Changes since v3: > > - Replaced the clock multiplexer implementation with branch-like clock. > > > > Changes since v2: > > - Added is_enabled() callback > > - Added default parent to the pipe clock configuration > > > > Changes since v1: > > - Rebased on top of [1]. > > - Removed erroneous Fixes tag from the patch 4. > > > > Changes since RFC: > > - Rework clk-regmap-mux fields. Specify safe parent as P_* value rather > > than specifying the register value directly > > - Expand commit message to the first patch to specially mention that > > it is required only on newer generations of Qualcomm chipsets. > > > > [1]: https://lore.kernel.org/all/20220401133351.10113-1-johan+linaro@xxxxxxxxxx/ > > Johan -- With best wishes Dmitry
