Hi Dmitry, Just conding style issues below. On 5/5/22 12:12, Dmitry Baryshkov wrote: > Supporting multiple MSI interrupts on Qualcomm hardware would benefit > from having these functions being exported rather than static. Note that > both designware and qcom driver can not be built as modules, so no need > to use EXPORT_SYMBOL here. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > --- > .../pci/controller/dwc/pcie-designware-host.c | 62 ++++++++++++------- > drivers/pci/controller/dwc/pcie-designware.h | 11 ++++ > 2 files changed, 49 insertions(+), 24 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > index 92dcaeabe2bf..c3b8ab278a00 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > @@ -255,7 +255,39 @@ int dw_pcie_allocate_domains(struct pcie_port *pp) > return 0; > } > > -static void dw_pcie_free_msi(struct pcie_port *pp) > +int dw_pcie_allocate_msi(struct pcie_port *pp) > +{ > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); > + int ret; > + > + ret = dw_pcie_allocate_domains(pp); > + if (ret) > + return ret; > + > + if (pp->msi_irq > 0) > + irq_set_chained_handler_and_data(pp->msi_irq, > + dw_chained_msi_isr, > + pp); Could you please align 2nd and 3rd function arguments to the open brace here and on all other places ... > + > + ret = dma_set_mask(pci->dev, DMA_BIT_MASK(32)); > + if (ret) > + dev_warn(pci->dev, "Failed to set DMA mask to 32-bit. Devices with only 32-bit MSI support may not work properly\n"); > + > + pp->msi_data = dma_map_single_attrs(pci->dev, &pp->msi_msg, > + sizeof(pp->msi_msg), > + DMA_FROM_DEVICE, > + DMA_ATTR_SKIP_CPU_SYNC); ditto > + ret = dma_mapping_error(pci->dev, pp->msi_data); > + if (ret) { > + dev_err(pci->dev, "Failed to map MSI data\n"); > + pp->msi_data = 0; > + return ret; > + } > + > + return 0; > +} > + > +void dw_pcie_free_msi(struct pcie_port *pp) > { > if (pp->msi_irq > 0) > irq_set_chained_handler_and_data(pp->msi_irq, NULL, NULL); > @@ -357,6 +389,9 @@ int dw_pcie_host_init(struct pcie_port *pp) > return -EINVAL; > } > > + /* this can be overridden by msi_host_init() if necessary */ > + pp->msi_irq_chip = &dw_pci_msi_bottom_irq_chip; > + > if (pp->ops->msi_host_init) { > ret = pp->ops->msi_host_init(pp); > if (ret < 0) > @@ -377,30 +412,9 @@ int dw_pcie_host_init(struct pcie_port *pp) > } > } > > - pp->msi_irq_chip = &dw_pci_msi_bottom_irq_chip; > - > - ret = dw_pcie_allocate_domains(pp); > - if (ret) > + ret = dw_pcie_allocate_msi(pp); > + if (ret < 0) > return ret; > - > - if (pp->msi_irq > 0) > - irq_set_chained_handler_and_data(pp->msi_irq, > - dw_chained_msi_isr, > - pp); > - > - ret = dma_set_mask(pci->dev, DMA_BIT_MASK(32)); > - if (ret) > - dev_warn(pci->dev, "Failed to set DMA mask to 32-bit. Devices with only 32-bit MSI support may not work properly\n"); > - > - pp->msi_data = dma_map_single_attrs(pci->dev, &pp->msi_msg, > - sizeof(pp->msi_msg), > - DMA_FROM_DEVICE, > - DMA_ATTR_SKIP_CPU_SYNC); > - if (dma_mapping_error(pci->dev, pp->msi_data)) { > - dev_err(pci->dev, "Failed to map MSI data\n"); > - pp->msi_data = 0; > - goto err_free_msi; > - } > } > } > > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h > index e1c48b71e0d2..f72447f15dc5 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -374,6 +374,8 @@ void dw_pcie_host_deinit(struct pcie_port *pp); > int dw_pcie_allocate_domains(struct pcie_port *pp); > void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, unsigned int devfn, > int where); > +int dw_pcie_allocate_msi(struct pcie_port *pp); > +void dw_pcie_free_msi(struct pcie_port *pp); > #else > static inline irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) > { > @@ -403,6 +405,15 @@ static inline void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, > { > return NULL; > } > + > +static int dw_pcie_allocate_msi(struct pcie_port *pp) > +{ > + return -EINVAL; > +} > + > +static void dw_pcie_free_msi(struct pcie_port *pp) > +{ > +} > #endif > > #ifdef CONFIG_PCIE_DW_EP -- regards, Stan