On 21/04/2022 13:28, Johan Hovold wrote:
On Thu, Apr 14, 2022 at 02:31:38AM +0300, Dmitry Baryshkov wrote:
PCIe pipe clk (and some other clocks) must be parked to the "safe"
source (bi_tcxo) when corresponding GDSC is turned off and on again.
Currently this is handcoded in the PCIe driver by reparenting the
gcc_pipe_N_clk_src clock.
Instead of doing it manually, follow the approach used by
clk_rcg2_shared_ops and implement this parking in the enable() and
disable() clock operations for respective pipe clocks.
Please take a look at the alternative approach of moving the pipe clock
muxing into the PHY driver:
https://lore.kernel.org/all/20220421102041.17345-1-johan+linaro@xxxxxxxxxx/
The implementation is more straight forward and I believe it is also
more conceptually sound as it ties the muxing to when the PHY is powered
on so that the GCC pipe clock always has a valid source.
I still have a slight preference for the automated variant:
- Your code is manually doing exactly the same thing. Remuxing the
clocks in connection to the GCC_PIPE_n_CLOCK enabling/disabling
- DTS compatibility is preserved
--
With best wishes
Dmitry
