On 16/04/2022 15:54, Frank Wunderlich wrote: > From: Frank Wunderlich <frank-w@xxxxxxxxxxxxxxx> > > Add compatibles for PCIe v3 General Register Files. > > Signed-off-by: Frank Wunderlich <frank-w@xxxxxxxxxxxxxxx> > --- > Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml > index 3be3cfd52f7b..ae48b58bd062 100644 > --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml > +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml > @@ -14,6 +14,8 @@ properties: > oneOf: > - items: > - enum: > + - rockchip,pcie30-phy-grf > + - rockchip,pcie30-pipe-grf These are without SoC parts. Are these PCIe v3 General Register Files part of some PCIe spec? > - rockchip,rk3288-sgrf > - rockchip,rk3566-pipe-grf > - rockchip,rk3568-usb2phy-grf Best regards, Krzysztof
