On Thu, Mar 24, 2022 at 04:25:20AM +0300, Serge Semin wrote: > While the rest of the generic DWC PCIe code is using the dedicated IO-mem > accessors, the dw_pcie_link_up() method for some unobvious reason directly > calls readl() to get PortLogic.DEBUG1 register content. Since the way the > dbi-bus is accessed can be platform-specific let's replace the direct dbi > memory space read procedure with the readl-wrapper invocation. Thus we'll > have a slightly more generic dw_pcie_link_up() method. > > Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> Thanks, Mani > --- > drivers/pci/controller/dwc/pcie-designware.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c > index e3d2c11e6998..6e81264fdfb4 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.c > +++ b/drivers/pci/controller/dwc/pcie-designware.c > @@ -548,7 +548,7 @@ int dw_pcie_link_up(struct dw_pcie *pci) > if (pci->ops && pci->ops->link_up) > return pci->ops->link_up(pci); > > - val = readl(pci->dbi_base + PCIE_PORT_DEBUG1); > + val = dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1); > return ((val & PCIE_PORT_DEBUG1_LINK_UP) && > (!(val & PCIE_PORT_DEBUG1_LINK_IN_TRAINING))); > } > -- > 2.35.1 >
