PCIe pipe clk (and some other clocks) must be parked to the "safe"
source (bi_tcxo) when corresponding GDSC is turned off and on again.
Currently this is handcoded in the PCIe driver by reparenting the
gcc_pipe_N_clk_src clock.
Instead of doing it manually, follow the approach used by
clk_rcg2_shared_ops and implement this parking in the enable() and
disable() clock operations for respective pipe clocks.
Changes since RFC:
- Rework clk-regmap-mux fields. Specify safe parent as P_* value rather
than specifying the register value directly
- Expand commit message to the first patch to specially mention that
it is required only on newer generations of Qualcomm chipsets.
Dmitry Baryshkov (5):
clk: qcom: regmap-mux: add pipe clk implementation
clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe
clocks
clk: qcom: gcc-sc7280: use new clk_regmap_mux_safe_ops for PCIe pipe
clocks
PCI: qcom: Remove unnecessary pipe_clk handling
PCI: qcom: Drop manual pipe_clk_src handling
drivers/clk/qcom/clk-regmap-mux.c | 78 +++++++++++++++++++++++
drivers/clk/qcom/clk-regmap-mux.h | 3 +
drivers/clk/qcom/gcc-sc7280.c | 6 +-
drivers/clk/qcom/gcc-sm8450.c | 6 +-
drivers/pci/controller/dwc/pcie-qcom.c | 87 +-------------------------
5 files changed, 92 insertions(+), 88 deletions(-)
--
2.35.1
