Am Donnerstag, dem 24.02.2022 um 11:06 +0800 schrieb Richard Zhu:
> The CLKREQ# signal is an open drain, active low signal that is driven
> low by the remote Endpoint device. But it might not be driven low if no
> Endpoint device is connected.
>
> On i.MX8MM PCIe, phy_init() may fail and system boot may hang if no
> Endpoint is connected to assert CLKREQ#.
>
> Handle this as on i.MX8MQ, where we explicitly assert CLKREQ# so the
> PHY can be initialized.
>
> Fixes: 178e244cb6e2 ("PCI: imx: Add the imx8mm pcie support")
> Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx>
Reviewed-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 4 ----
> 1 file changed, 4 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 78e32a539060..168cb1287ba9 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -447,10 +447,6 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
> case IMX7D:
> break;
> case IMX8MM:
> - ret = clk_prepare_enable(imx6_pcie->pcie_aux);
> - if (ret)
> - dev_err(dev, "unable to enable pcie_aux clock\n");
> - break;
> case IMX8MQ:
> ret = clk_prepare_enable(imx6_pcie->pcie_aux);
> if (ret) {
